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INTEGRATED CIRCUITS
74F377A Octal D-type flip-flop with enable
Product specification IC15 Data Handbook 1996 Mar 12
Philips Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
FEATURES
High states)
* High impedance inputs for reduced loading (20A in Low and * Ideal for addressable register applications * Enable for address and data synchronization applications * Eight edge-triggered D-type flip-flops * Buffered common clock * See 'F273A for Master Reset version * See 'F373 for transparent latch version * See 'F374 for 3-State version
TYPE 74F377A TYPICAL fMAX 165MHz
DESCRIPTION
The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
TYPICAL SUPPLY CURRENT (TOTAL) 29mA
ORDERING INFORMATION
PACKAGES 20-pin plastic DIP 20-pin plastic SOL COMMERCIAL RANGE VCC = 5V10%; Tamb = 0C to +70C N74F377AN N74F377AD PKG. DWG. # SOT146-1 SOT163-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS D0 - D7 CP E Q0 - Q7 Data inputs Clock pulse input (active rising edge) Enable input (active-Low) Data outputs DESCRIPTION 74F(U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 50/33 LOAD VALUE HIGH/LOW 20A/20A 20A/20A 20A/20A 1.0mA/20mA
PIN CONFIGURATION
E Q0 1 2 20 VCC 19 Q7 18 D7
LOGIC SYMBOL
3 4 7 8 13 14 17 18
D0 3 D1 4 Q1 Q2 5 6
D0 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 CP VCC = Pin 20 GND = Pin 10 2 Q0 11 1 D2 7 D3 8 Q3 9 CP E
D1
D2
D3
D4
D5
D6
D7
Q1
Q2
Q3
Q4
Q5
Q6
Q7
5
6
9
12
15
16
19
GND 10
SF00350
SF00351
1996 Mar 12
2
853-0026 16555
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
LOGIC SYMBOL (IEEE/IEC)
1 11 G1
FUNCTION TABLE
INPUTS E CP Dn h l OUTPUTS Qn H L Load "1" Load "0" OPERATING MODE
1C2
l
3 4 7 8 13 14 17 18 2D 2 5 6 9 12 15 16 19
l
h X no change Hold (do nothing) H X X no change H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don't care = Low-to-High clock transition
SF00352
LOGIC DIAGRAM
D0 3 1 E D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 18 D7
D CP 11
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
CP
2 Q0 VCC = Pin 20 GND = Pin 10
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
SF00353
1996 Mar 12
3
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free air temperature range Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 40 0 to +70 -65 to +150 UNIT V V mA V mA
C
C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VIH VIL IIk IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free air temperature range 0 4.5 2.0 0.8 -18 -1 20 +70 LIMITS NOM 5.0 MAX 5.5 V V V mA mA mA UNIT
C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 E & CP inputs VOH High-level output voltage Other inputs VCC = MIN, VIL = 0.0V3, 10%VCC 5%VCC 10%VCC 5%VCC 10%VCC 5%VCC MIN 2.5 2.7 2.5 2.7 0.35 0.35 -0.73 0.50 0.50 -1.2 100 20 -20 -60 27 -150 40 3.4 LIMITS TYP2 MAX V V V V V V V A A A mA mA UNIT
VIH = 4.5V3, IOH = MAX VCC = MIN, VIL = MAX, VIH = MIN, IOH = MAX VCC = MIN, VIL = MAX, VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX ICCH VCC = MAX
VOL VIK II IIH IIL IOS ICC
Low-level output voltage
Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short circuit output current4
Supply current (total)
ICCL VCC = MAX 29 43 mA Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. To reduce the effect of external noise during test. Special test conditions are not necessary for the '377A. 4. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1996 Mar 12
4
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
AC CHARACTERISTICS
LIMITS Tamb = +25oC VCC = +5.0V CL = 50pF RL = 500 MIN fMAX tPLH tPHL Maximum clock frequency Propagation delay CP to Qn 1 1 150 3.0 4.5 TYP 165 5.0 6.5 8.0 9.0 MAX Tamb =0oC to +70oC VCC = +5.0V 10% CL = 50pF RL = 500 MIN 120 2.5 4.0 9.0 10.5 MAX MHz ns
SYMBOL
PARAMETER
WAVEFORM
UNIT
AC SETUP REQUIREMENTS
LIMITS Tamb = +25oC VCC = +5.0V CL = 50pF RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP Setup time, High or Low E to CP Hold time, High or Low E to CP Clock Pulse width High or Low 2 2 2 2 1 2.5 2.5 1.0 0.0 3.0 4.0 0.0 0.0 4.0 4.0 TYP MAX Tamb = 0oC to +70oC VCC = +5.0V 10% CL = 50pF RL = 500 MIN 2.5 2.5 1.0 0.0 3.0 4.5 0.0 0.0 5.0 4.0 MAX ns ns ns ns ns
SYMBOL
PARAMETER
WAVEFORM
UNIT
AC WAVEFORMS
1/fmax Dn CP VM tw(H) tPHL VM tw(L) tPLH VM ts VM VM th VM VM
Qn
E
VM
VM th = 0
VM
VM th = 0
SF00294
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency
CP NOTE: For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
ts(L) VM
ts(H) VM
SF01237
Waveform 2. Data and Enable Setup and Hold Times
1996 Mar 12
5
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
TEST CIRCUIT AND WAVEFORM
VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V)
90%
Test Circuit for Open Collector Outputs SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open
VM
Input Pulse Definition
DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00128
1996 Mar 12
6
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
1996 Mar 12
7
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1996 Mar 12
8
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
NOTES
1996 Mar 12
9
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74F377A
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05121
Philips Semiconductors
yyyy mmm dd 10

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